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Cray X-MP Supercomputer Memory.Front Side & Back-Blank,Certificate Authentically For Sale


Cray X-MP Supercomputer Memory.Front Side & Back-Blank,Certificate Authentically

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Cray X-MP Supercomputer Memory.Front Side & Back-Blank,Certificate Authentically:
$149

The Gold Memory are Inmos & Motorola. Best for the exhibit.
Seymour Roger Cray Inventor & Steve Chen is the "Clean-Up" of the Cray-1 into Cray X-MP & Cray Y-MP. Changing over 3-5 IC into one. 3-5 times the Cray-1 in some cases.
Starting at $149 only.
Since you are order the first module board, you can take advantage for the shipping rate:It is allowed up to 20 lbs at the same price.
So, if you will add on up to two board more, the shipment on the first module already covers the shipping.
You may add two more board.
I suggest the Cray X-MP ELC board $99
And of of the Cray-1 ELC or Memory Board $169. They will added up to 19 lbs.
The Cray-1 Memory Board are Brown but if you want a double sides it is $50, you can tell by the connectors either a "J" slip on the 12 cylinders or the 8 cylinders with the screw in. I bought both machine in L.L.L.
Or you can have it in White. Only one out of 50 are built this way. Fairchild was the manufacture.
Also, Cray X-MP Memory Board is being built for you. Since it is stock with both sides Silver.
But, you may select Gold for $25 to $50 for Gold on both Sides.
Also, on the Cray-1, some customer like the Stamp with a Cray Logo on it. Usually they smear and it is destroyed 19 out of 20. But, I have some they are very nice Cray Logo on it for $50.
I also have some very few Cray X-MP Memory Board that are the three connects on it. Manufacture by Micron
Those are $499 per board or $599 with it in the Lucite.
I have some Xstal for the Cray X-MP ELC, and it is with the Lucite for $249-$349.
Just let me know!
Also I have the Cray-2 ECL & Memory Boards at $149 per piece.
X-MPCray X-MPManufacturerCray ResearchTypeSupercomputerRelease date1982PredecessorCray-1

TheCray X-MPwas asupercomputerdesigned, built and sold byCray Research. It was announced in 1982 as the "cleaned up" successor to the 1975Cray-1, and was the world's fastest computer from 1983 to 1985.[1]The principal designer wasSteve Chen.

Contents
  • Description
    • Extended Architecture series
      • I/O subsystem
        • Pricing
          • Successors
            • Usage
              • Image gallery
                • References
                  • Further reading
                    • External links
                        The X-MP's main improvement over the Cray-1 was that it was a shared-memoryparallelvector processor, the first such computer from Cray Research. It housed two CPUs in a mainframe that was nearly identical in outside appearance to the Cray-1.

                        The X-MP CPU had a faster 9.5nanosecondclock cycle (105MHz), compared to 12.5ns for the Cray-1A. It was built circuitscontaining 16emitter-coupled logicgateseach. The CPU was very similar to the Cray-1 CPU in architecture, but had better memory bandwidth (with two read ports and one write port to the main memory instead of only one read/write port) and improved chaining support. Each CPU had a theoretical peak performance of 200MFLOPS, for a peak system performance of 400MFLOPS.[2]

                        The X-MP initially supported 2 million 64-bitwords(16 MB) of main memory in 16 banks, respectively. Memory bandwidth was significantly improved over the Cray-1—instead of one port for both reads and writes, there were now two read ports, one write port, and one dedicated to I/O. The main memory was built from 4Kbit bipolar SRAM ICs. CMOS memory versions of the Cray-1M were renamed Cray X-MP/1s. This configuration was first used for Cray Research's UNIX port.

                        In 1984, improved models of the X-MP were announced, consisting of one, two, and four-processor systems with 4 and 8 million word configurations. The top-end system was the X-MP/48, which contained four CPUs with a theoretical peak system performance of over 800MFLOPS and 8 million words of memory.[2]The CPUs in these models introduced vectorgather/scattermemory reference instructions to the product line. The amount of main memory supported was increased to a maximum of 16 million words, depending on the model. The main memory was built from bipolar or MOS SRAM ICs, depending on the model.

                        The system initially ran the proprietaryCray Operating System(COS) and was object-code compatible with the Cray-1. A UNIXSystem Vderivative initially named CX-OS and finally renamedUniCOSran through a guestoperating systemfacility. UniCOS became the main OS from 1986 onwards. TheDOEran theCray Time Sharing SystemOS instead. See the Software section for theCray 1for a more detailed elaboration of software (language compiler, assembler, OSes, and applications) as X-MPs and 1s were mostly compatible.

                        Extended Architecture seriesEdit

                        Cray Research announced the X-MP Extended Architecture series in 1986. The EA series CPU had an 8.5ns clock cycle (117MHz), and was built frommacrocell arrayand gate array ICs. The EA series extended the width of the A and B registers to 32 bits and performed 32-bit address arithmetic, increasing the amount of memory theoretically addressable to 2 billion words. The largest configuration produced was 64 million words of MOS SRAM in 64 banks. For compatibility with existing software written for the Cray-1 and older X-MP models, 24-bit addressing was also supported. Each EA series CPU's peak performance was 234MFLOPS. For a four-processor system, the peak performance was 942MFLOPS.[citation needed]

                        I/O subsystemEditCray DD-49

                        Formagnetic tapeI/O, the system could interface withIBM 3420and3480tape units directly without a lot of CPU processing.[3]

                        PricingEdit

                        A 1984 X-MP/48 cost aboutUS$15million plus the cost ofdisks. In 1985Bell Labspurchased a Cray X-MP/24 for $10.5 million along with eight DD-49 1.2GB drives for an additional $1 million. They received $1.5 million of trade-in credit for their Cray-1.[4]

                        SuccessorsEdit

                        TheCray-2, a completely new design, was introduced 1985. A very different compact four-processor design with from 64MW (megaword) to 512MW (512MB to 4GB) of main memory, it was specified to 500MFLOPS but was slower than the X-MP on certain calculations due to its high memorylatency.

                        The X-MP-succeedingCray Y-MPseries was announced in 1988; it also had a new design, replacing the 16-gate ECLgate arrayswith a more compactVLSIgate array with larger circuit boards. It was a major improvement of the X-MP supporting up to eight processors.

                        UsageEdit
                        • The short film "The Adventures of André and Wally B.", released in 1984 by The Graphics Group, a then-Lucasfilm subsidiary which would later become Pixar, used an X-MP/48 for much of its rendering. Special thanks is given to Cray Research in the short's credits for use of the machine.
                        • The 1984 filmThe Last Starfighterdepended heavily on high polygon count (for the time) models with complex lighting effects, the rendering of which was made possible by the use of the X-MP.[5]
                        Image galleryEditBelow are the Cray-1
                        Historical: THE FASTEST NUMBER CRUNCHERSScience Now, Volume 1, Issue 1, 1982, pp. 30-31(Historical Article)A new generation of supercomputers, tackling
                        super sized problems - like tomorrow's weatherSuper computers capable of 100 million arithmetical operations per second now make it possible for scientists to create highly-accurate three-dimensional simulations of complex problems. They cost huge sums - but a fraction of the price of sinking an oil well in the wrong place, or building a lethal nuclear reactor.

                        One of the prime tasks of the 50 or so supercomputers in the world is weather prediction. No longer a matter of simply reading a barometer, or looking at a few clouds, weather forecasting has become an intensely mathemtical operation. At any point in the atmosphere, the physical properties which go to make up the weather - temperature, pressure, wind and so on - depend largely on the state of the surrounding air. Complex mathematical expressions have been developed which express these interrelationships: if you know the values for the various physical properties at some point in the atmosphere you can calculate the values at other points - and so find out what the weather is like somewhere else. The problem is that the number of calculations required is enormous. For an accurate prediction, equations have to be solved for millions of points throughout the atmosphere - and each point requires many separate equations. Conventional computers would take hours or even days to compute problems of this complexity - and by that time the result wouldn't be a forecast.


                        The next generation

                        Only supercomputers have the power to perform enough calculations in time to produce useful results. They perform their miracles by a combination of existing technology, with some new tricks of their own.

                        One of the first supercomputers - Illiac IV - contained 32000 memory chips each using a technology known as medium scale circuit integration (MSI) to hold 256 bits (each bit, or binary digit, represents a 0 or 1 of the binary code which computers operate in). By contrast, the central memory of today's supercomputers - Cray-1 and Cyber 205 - use large-scale integration (LSI) to give a transistor density allowing 4096 bits per chip. And the next generation of supercomputers will have sixteen times more memory! The Cray X-MP could be five times faster than Cray-1.

                        Increasing packing density in this way does not only give more memory for lower cost. It also speeds up operations. Digital computers operate in fixed pulses, regulated by internal clocks: only at each 'tick' of the clock can the states of memories be changed and data moved from one part of the computer to another. The clock cycle - the time between ticks - is now as short as one hundred-millionth of a second (ten nanoseconds). So, circuits within the computer that operate near-simultaneously (in less than one nanosecond) have to be placed very close together.

                        But pure speed is not the only yardstick of computing power - the human brain is about 100000 times slower than Cray-1, yet still manages feats of data processing that computer programmers can only dream about. So to increase their computing power, supercomputers are designed to use a range of techniques that are more subtle than mere increases in speed and size. Supercomputers, unlike conventional computers, are multiprocessors. Instead of having a single central processor or 'brain' they possess many processing units. The S-1 supercomputer, developed by the US Navy, is made up of sixteen individual uniprocessors, each a computer in its own right, but which share a main memory. Each uniprocessor can operate independently or, on large problems, jointly.

                        Another supercomputer technique is pipelining. A simple computer instruction (for example, to add together two numbers) requires up to ten steps, most concerned with fetching and carrying rather than with arithmetic. The two numbers to be added have to be located in the memory, transferred to the processor for addition, and then the result has to be stored in some other numbered memory location. In simple computers this is carried out a step at a time. With supercomputers, the main functional instructions are cut up into small pieces, and all stages handled independently. And it is this that makes them so superfast.

                        (illustrations)

                        Figure 1 [Next to a picture of the Cray-1] Costing over $10 million and weighing over 4 tonnes, the Cray-1 is one of the most powerful supercomputers commercially available. Designed to solve the complex spatial problems encountered in aerodynamics, Cray-1 can compute at a peak rate of 100 million arithmetical operations per second. The computer's 'brain' and memory are housed in the twelve-sided structure in the foreground. The input/output system is made up of three small, fast computers with extended memory and is housed within the four-sided segment to the left. The padded 'seats' which surround both units contain the power systems.

                        Figure 2 [Next to 4 images, each a screenshot of a rendered partially transparent airflow simulation] Supercomputer simulation of the airflow over the rear of a rocket travelling just below the speed of sound, predicted at a quarter of a million points. The simulation required over 10 billion arithmetical operations and took 18 hours. The simulation presents the rocket from all angles and depicts a horseshoe-shaped region where the airflow over the rocket reaches the speed of sound. Computer simulations of airflow closely resemble results from wind tunnel tests, but are much cheaper and allow designs to be changed and tested simply and swiftly.

                        Figure 3 [Next to a small photo of the internal wiring] The maze of wires which interconnect the 1600 circuit boards contained within the central processor of Cray-1. Each of the 300000 wires is cut to the same length to ensure that signal transmission times between two points are constant. This allows the computer to tackle thousands of calculations at the same time with different circuits working in parallel.

                        Figure 4 [Next to an architecture diagram of supercomputer compared to simple computer] Simultaneous calculation characterizes the Supercomputer and can be seen in its basic structure, or architecture. Unlike conventional computers, supercomputers do not have one or two central processors but possess many 'uniprocessors' - each a computer in its own right. Furthermore, the uniprocessors are linked to the memory in such a way that when the computer is given a complex problem it can instantly break it up and begin tackling it from all sides at once - a process called 'pipelining'. This is the fundamental difference between supercomputers and conventional 'step-by-step' computers and is the key to their incredible ability to crunch numbers.

                        Figure 5 [Next to six images - two rows of three - of simulated airflow; four are wireframe, the other two are wireframe but with hidden lines removed (one on each row)] Simulating the airflow over a three-dimensional object requires a computer of immense power and flexibility. In these projections of the aerodynamics of the rear part of a rocket, supercomputer Illiac IV was programmed to predict the effects on the airflow of altering the angle at which the rocket pierces the air - the angle of attack. By comparing the top displays which represent a four-degree angle of attack with the lower series which correspond to a 12-degree angle, it can be seen that turbulence increases with angle. The computations are further broken down to illustrate the changes in air pressure over the rocket, the horseshow of accelerated air, and the shearing effect of the air adjacent to the rocket body. Simulations of this level of complexity afford engineers the opportunity to fly their rockets even before they are built.

                        (

                        IEEE TRANSACTIONS ON COMPONENTS, HYBRIDS, AND MANUFACTURING TECHNOLOGY, VOL. CHMT-4, NO. 2, JUNE 1981 181CRAY-1 Computer Technology

                        JAMES S. KOLODZEY,

                        Abstract-Hardware and packaging technology which provide the high performance of the CRAY-1 computer are reviewed. A brief overview of the computer is given, followed by a description of the computer circuits, packaging, power distribution, and cooling system.

                        I. INTRODUCTION

                        SINCE ITS introduction in 1976, the CRAY-1 has developed a reputation as a fast and reliable scientific processor. The CRAY-lS, announced in 1979, offers enhanced input/output (I/O) capability and an increase of the maximum memory size from one million to four million words. A photo of the CRAY-1S is shown in Fig. 1, where the large section at the left contains the central processing unit (CPU) and memory, and the smaller section at the right contains the I/O proc- essor. Fig. 2 shows the CPU chassislayout and circuit module locations. Data and control signal paths are given in Fig. 3. Applications for the CRAY-1 include large-scale calculations of the type required in weather forecasting, petroleum and earthquake seismology, structural analysis, nuclear engi- neering, and particle physics.

                        The CRAY-1 characteristic of combined high performance and reliability results from simple hardware design. One chip type is used predominantly in the CPU, and one memory chip type is used in the memory banks. Each arithmetic oper- ation has a dedicated hardware functional unit, and the logic and circuit design is governed by straightforward ground rules. The power supplies are simple rectifier/filter types and the cooling system is a standard refrigeration unit. Whenever possible problems were solved with existing technology. This paper reviews the CRAY-1 hardware in detail.

                        II. SYSTEM OVERVIEW

                        Table 1 is a listing of some CRAY-1S performance char- acteristics. The logic gates in the CPU are mostly emitter- cou$&l ‘logic (ECL) diial‘NANDintegrated circuits,-(IC%). Gate counts of the hardware functional units are given in Table II. Additional gates are used for control and storage functions which tie the hardware functions together. A full memory CRAY-IS contains four million words of high speed ECL random accessmemory (RAM). The 4K X 1.bit random accessmemory (RAM) chips are arranged to give a word length

                        of 64 bits plus 8 bits for single error correction, double error detection (SECDED). The SECDED is an implementation of a Hamming code. A total of 73 728 RAM chips are used.

                        The CRAY-1 is a vector processor with the ability to oper- ate iteratively on strings of up to 64 (vector length) operands

                        Manuscript received October 16, 1980; revised January 29, 1981.

                        The author is with Cray Laboratories, 3375 Mitchell Lane, Boul- der, CO 80301.

                        MEMBER, IEEE

                        Fig. 1.

                        CRAY-IS

                        mainframe.

                        0148-6411/81/0600-0181$00.75 0 1981 IEEE

                        or operand pairs. By contrast, scalar processors perform one iteration on one or a pair of operands. Each operand has a word length of 64 bits, which for floating point operations comprises a 49-bit signed coefficient and a 15-bit exponent. The CRAY-1 has the ability to operate efficiently even with short vector lengths [l] , and it is also a fast scalar processor.

                        Machine performance is expressed in millions of floating point operations per second (megaflops) because a single vec- tor instruction is equivalent to a loop of several scalar instruc- tions. The CRAY-1 has been shown capable of a sustained rate of 138 Mflops and to achieve 250 Mflops in short bursts

                        [2] . System reliability is excellent, with an availability greater than 98 percent. Mean time between interruption (MTBI)is more than 100 h, and mean time to repair (MTTR) is about 1h [3].

                        III. CIRCUIT COMPONENTS

                        One chip type comprises about 95 percent of the IC’s in the CPU. The chip is a negative logic, five and four input dualNANDgate (S/4 gate) with complementary outputs. A logic diagram is shown in Fig. 4. The S/4 gate is an ECL circuit with 750 ps propagation delay and 60 mW per gate power dis- sipation (120 mW per package). The 0.036 in square silicon die is packaged in a hermetically sealed 16-pin ceramic flatpack. Package dimensions are 3/8 X l/4 X l/12 in with leads on 50 mil centers as shown along with the smaller resistor package (described below) in Fig. 5. The ceramic flatpack is used for reliability, small size, and speed.

                        Other chips are a dual D flip flop, a 16 X 4 bit register with a 6 ns accesstime, and the 4K X 1 bit RAM with 25 ns access time packaged in an l&pin ceramic flatpack.

                        In addition to the IC’s the only other circuit component on the printed circuit. (PC) board is the transmission line termina-

                        182

                        IEEE TRANSAClIONS ON COMPONENTS, HYBRIDS, AND MANUFACTURING TECHNOLOGY, VOL. CHMT4, NO. 2, JUNE 1981

                        I! I

                        SCN.AR ADD

                        SCALARREGISTERS

                        ADDRESS REGISTERS

                        RECIP. APPROX.

                        SECDED

                        ADDRES! MULTIPL

                        KL i

                        TOW ICE

                        DDRESS ANOUT

                        x3xI BIT!

                        tSTOluGE

                        ITORAGE 1

                        / .OCK AND

                        ,DRESS LNOUT

                        FLOCK *NII.cA.DDRESS

                        ‘ANOUT

                        I

                        ECDED

                        Vi E 1% TO FUNCTIONAL UNITS

                        I ‘DATA T6 YECTOR REGISTERS :LOCK AN

                        I

                        REGISTERS , I

                        ADDR FAhOllT j ----rj

                        Fig. 2. General chassislayout.

                        UIDRESS

                        KOLODZEY: CRAY-1 COMPUTER TECHNOLOGY

                        183

                        ((Ah) l jkml

                        Fig. 3. ,Computation section.

                        184

                        IEEETRANSACTlONSON COMPONENTSH, YBRIDSA, ND MANUFACTUJUNGTECHNOLOGYV, OL.CHMT-4,NO.2,JUNE1981

                        Functional Unit

                        Address adder Address multiply Scalaradd Scalar single shift Scalar double shift Constant to Si Pop and zero count to Ai Vector integer add Vector logical

                        2.595.33 3.94 1.93 3.95 0.64 0.54 2.94 2.64 4.60 0.65

                        11.030.7 28.6

                        100.05

                        Vector shift Vector pop count Floating add Floating multiply Reciprocal

                        Total

                        -

                        Fig. 5.

                        5/4 gate and resistor package.

                        TABLE style="margin-top: 0px; margin-right: 0px; margin-bottom: 0px; margin-left: 0px; font: normal normal normal 9.3px/normal Arial; ">resulting in about 1.5 W/in* for the resistor film. A total of 495 934 resistor packagesare used in the CRAY-1.

                        IV. CIRCUIT INTERCONNECTION

                        The field replaceable units in the (RAY-1 are modules of the type shown in Fig. 6. Visible here is a 6 X 8 in multilayer printed circuit board which can accomodate up to 144 IC packages in a 12 X 12 array. The PC boards are five-layer structures with the following layer assignments: components and signal traces; ground (V,,); -~~(‘(VTT); -5.2 V(VEE); and a second-signal layer. The board material is Cl0 glass- epoxy with 1 oz copper conductor layers. Via and component holes are plated through with a 0.022~in inside diameter.

                        With signal rise times (10 percent-90 percent) of 750 ps, open line stub lengths must be less than 0.5 in to hold re- flections under 35 percent overshoot and under 12 percent undershoot. Larger reflections can saturate gate inputs and reduce noice immunity. Longer signal runs must use trans- mission lines terminated in the line characteristic impedance. The CRAY-1 boards have 7-mil wide lines and 7-mil spaces. The 7-mil height above a ground (or power) plane results in a 60-52 microstrip line with a delay of 0.15 ns/in. Gate loads appear as open stubs on the line as shown in Fig. 7. Fan out is limited to four on board or three off board to reduce ac loading problems.

                        Signal propagation between gates is governed by strict timing rules as shown in Fig. 8. The 12.5 ns clock is divided into eight “gate times” of about 1.5 ns each. Roughly half the gate time is due to circuit propagation delay, and half is due to board-foil delay. Unused gates can be dropped from the path by adding 3 in of foil conductor.

                        A CRAY-1 module consists of two PC boards sandwiching a 0.08-in thick copper cooling plate that is also the ground bus. Signal communication between boards is performed differentially over 120-52 twisted pair in the backplane as shown schematically in Fig. 9. The 120-a twisted pair is matched to two 60-a board traces in series. This differential method permits a low cross talk communication path and provides both the signal and its complement for use on the receiving module. An inverter gate (and gate delay) is therefore saved if the signal complement is needed. The twisted pair attaches to the module by a 96-pin pair connector with pins on 0.05 in centers. The board side of the connector pair is visible in Fig. 6 at the top.

                        Interconnection ground rules restrict twisted pair lengths to multiples of gate times, or multiples of 1 ft to a maximum of 4 ft. These circuit rules prevent timing problems or race conditions from happening anywhere in the machine. The CRAY-1 backplane contains 67 mi of twisted pair wire. The first machine was completed with no wiring errors.

                        V. .SYSTEM POWER

                        Voltage requirements for the PC board are -5 .2v(vE6) for the IC’s and -27/‘(7/,,) for the termination resistors. No by- pass capacitors are: used on the PC board. A benefit of using the 5/4 gate IC is that it provides a balanced load to the supply. ‘When one output turns on, another turns off, and the

                        CPU: Memory: Clock: Power: Operations:

                        Availability: MTBI:

                        230000 gates4million words 12.5 ns 130 kW

                        138 Mflops 250 Mflops burst 98 percent 100 h

                        TABLE IICRAY-1SGATE COUNTS

                        Gate Count

                        1952 4009 2968 1452 2976

                        482

                        403 2216 1984 3460 ,490 8247

                        23116 21504

                        75259

                        5/4 gate schematic.

                        Percentage of Total

                        Fig. 4.

                        tion resistor. Two 60-S2tantalum nitride thin film resistors are packaged in a ceramic T package with a common termination voltage lead. The 1300 W/in* power handling capability of the thin film material allows for a very small size resistor. power supply loading is purely resistive and constant. Any Peak power dissipation is approximately 20 mW per resistor, ripple which occurs during the transitions is filtered out by

                        01

                        .$%2345670

                        6 NS GATE DELAY 6.5 NS WIRING DELAY

                        Fig. 8. CRAY-1 gate timing.

                        Fig. 7.

                        k3Printed circuit transmission lines,

                        Fig. 6.

                        CRAY-1 module.

                        Fig. 9. Intermodule communication.

                        the 16-nF capacitor formed by the power and ground plane in the PC board.

                        A CPU module (two boards) can dissipate up to 36 W (7 A) from FE, and about 1.2 W (0.6 A) from VTT. There are 576 CPU modules. Taking an averageof 25 W per module, the CPU dissipates a total of 14.4 kW. Each memory module contains 64 of the 4K X 1 bit ECL RAM chips which dissipate about 1 W each, and some interface logic chips. The power dissipation of the memory module is about 70 W. A full four million word CRAY-1S contains 1152 memory modules with a total memory power dissipation of 81 kW. Total power dissipation for the computer is 95 kW. Approximately 130 kW is supplied to the entire machine including power supply losses.

                        The computer modules receive FE, and VTT power from power supplies located under the seatsaround the periphery of the computer. These power supplies are simple linear rectifier-filter types which receive 400 Hz ac voltage from 36 variable transformers on a power distribution unit (PDU). The PDU receives 208 Vat at 400 Hz from a motor generator (MC) set which converts 480 V at 60 Hz to 208 V at 400 Hz. Each installation has two MG sets with one available for backup.

                        VI. SYSTEM COOLING

                        The CRAY-1S cooling system is designed to limit the IC die temperature to a maximum of 65°C. This provides a relia- bility margin from the 150°C absolute maximum IC junction temperature. The IC package case is maintained at 54°C. Heat generated in the silicon die flows through the IC package to the PC board ground plane and then to the 0.08-in thick copper cold plate. The cold plate conducts the board heat to its edges, which are held to 25°C by contact with a cast aluminum cold bar. The aluminum cold bars form the twelve vertical columns in the computer mainframe into which the modules slide horizontally on 0.4-in spacings. A refrigerant, Freon 22, flows through stainless steel tubes embedded in the cold bars. The development of the composite aluminum/ stainless steel cold bars represents a solution to one of the more difficult design problems of the CRAY-1. Cast aluminum is actually porous and oil mixed in with the Freon can cause reliability problems if it leaks onto the modules. A method to bond stainless steel tubing into cast aluminum had to bein-vented in order to make the cold bars practical.

                        The refrigerant is maintained at 18.5’C by an evaporative refrigeration system. Freon 22, which boils -41°C (at atmos- pheric pressure), absorbs heat from the cold bar and changes to the gasphase. It passesthrough a compressor and condenses

                        PACKAGE AND BONDING LEADS

                        7

                        186 IEEE TRANSACTIONS ON COMPONENTS HYBRIDS, AND MANUFACTURING’TECHNOLOOY, VOL. CHMT-4, NO. 2. JUNE 1981

                        back to aliquid by releasingheat to acold water supply which flows at 40 gal/min. The maximum heat load of this system is 580 000 B/h.

                        VII. FUTURE TECHNOLOGY

                        Key hardware problems in designing high-speed computers are heat removal, circuit interconnection, IC p,ackaging,circuit density, and device speed. Improvements in these areas can directly improve computer performance.

                        TABLE III

                        Many factors contribute to the cooling problem. A given circuit technology is power-delay product limited. Short gate Silicon propagation delays require a high gate power dissipation, Large numbers of gatesper chip asin LSI will causetotal chip power to be well over 1 W, and the requirement for dense packaging for short wire delays will cause a heat density problem. Furthermore, cooler circuits run more reliably. All this creates demand for a high performance cooling system.

                        TABLE IVTECHNOLOGY GATE PROPAGATION

                        POWER DELAY PRODUCTS

                        =pd

                        400 ps 80 ps 15ps

                        1.50 - W CM-“C

                        DELAYS AND

                        pd x =pd

                        4.5 pJ 0.1 pJ 1.0 fJ

                        Silicon chip wire propagation delays ii11 slow down system speed.Gallium arsenide

                        Until the day when a whole mainframe is on a chip, inter-

                        This delay is minimized by using low dielectric PC board materials such as Teflon (e, = 2.4) and polymide (e, = 3.5) rather than glass-epoxy (er = 4.5). Using surface micro- strip lines rather than buried stripline also decreases wire delay. Fine signal line widths and spacings help shrink chip- chip spacings, especially with large numbers of leads per pack- temperatures, device mobility increases and delays of 20 ps age. Present CRAY-I boards use 7 mil lines and spaces. Four and power-delays of 10 FJ may be possible [5]. The lowest to five mil lines may be the limit for subtractively etchedpower technology would use Josephson Junctions (JJ’s), butPC boards, so new techniques will be needed.

                        Smaller IC packages help both mechanically with reduced PC board real-estate and electrically with reduced lead induct- ance and capacitance. Table III lists some properties of pack- aging materials. Improved designssuch asceramic chip carriers permit a higher board density and a more uniform wire length from external lead to IC die. A rough rule of thumb for wire inductance is 12 nh/in. With subnanosecond signal edge CRAY-1 system practical [6] . speeds, bond wire lengths of more than a few hundred mils can cause severe delay and waveform degration. A package can add 1 pF or more to the gate input capacitance. This can add to signal delay by a factor of 30 ps/pF. The author wishes to thank all the Cray personnel whose

                        ACKNOWLEDGMENT Improved circuit technology gives a direct benefit to com- efforts and contributions made the CRAY-1, and therefore

                        puter speed. Table IV gives some rough numbers of circuit performance for comparison purposes. Silicon ECL may reach a delay limit in the low hundreds of picoseconds, and a power-delay limit in the low picojoule range. Significant im- provement is gained by switching to high mobility materials such as gallium arsenide or indium phosphide. Technical problems need to be solved, however. Processing of these materials is still in the early stages.Gates have been fabricated using GaAs transistors, but problems exist with device thresh- old voltage uniformity and limited current drive due to input saturation as compared to silicon bipolar or MOS devices. An insulated gate structure would alleviate the current drive

                        this paper, possible.

                        Glass-Epoxy Alumina Beryllia

                        SOME MATERIAL

                        Signal Line Width 0.004 in

                        0.003 in 0.003 in 2um

                        PARAMETERS

                        Dielectric Constant

                        4.5 8.9 6.8

                        11.7

                        Thermal Conductivity

                        W

                        0.0024 ~ CM-“C

                        W 0.28 -CM-“C

                        CIRCUIT

                        Josephsonjunctions

                        limitation and permit a high performance memory circuit. Further speed increase from these materials occurs by oper- sting. at liquid nitrogen temperatures (77 K) [4]. At low

                        the necessity of liquid helium (4’K) cooling may make JJ’s less attractive than cooled GaAs.

                        VIII. CONCLUSION

                        This paper has provided a review of the CRAY-1 computer hardware. It has been shown that high performance compo- nents, clever packaging, and syst,ems design have made the

                        REFERENCES

                        111 P.M. Johnson, “An introduction to vector processing,”Comput. Design,pp.89-97, Feb. 1978.

                        PIR. M. Russell, “The CRAY-1 Computer System,”Commun. ,Assoc. Comput. Machinery,vol. 21, no. 1, pp. 63-72, Jan. 1978.

                        [31 Cray ResearchInc. field engineering statistics.

                        [41

                        r51

                        M. S. Shur and L. F. Eastman, “Ballistic and nearballistic transport in GaAs,”IEEE Trans. Electron Devices,vol. ED-l, no. 8,pp. 147-148, Aug. 1980.W. Twaddell, “IC’s and semiconductors,” EDN, pp.37-50, Dec. 15, 1979.

                        [61CRAY-IS Series Hardware Reference Manual,CRAY-1 ComputerSystems, HR-0808, Cray ResearchInc., 1980.

                        1.68 -

                        W CM-“C


                        July 16, 20061979 Review of the Cray-1 Supercomputer (Jun, 1979)
                        Filed under: Computers,Origins — @ 11:07 am
                        Source: Popular Science ( More articles from this issue )
                        Issue: Jun, 1979
                        Buy on
                        Tags: cray
                        Cool article and review about the Cray-1 the first really high end production supercomputer.It cost $8 million and performed at blistering 80 MFLOP/s. For comparison, a Pentium 4 2.8ghz can hit about 2.5 GFLOP/s or about 31 times faster. The current supercomputer champ can handle 280 TFLOP/s or about 350,000 times faster.
                        |<< << Previous 1 of 4 Next >> << Previous 1 of 4 Next >> Cray-1 cruises at 80 million operations a secondIt’s 10 times faster than the biggest IBM, with six times more memoryBy JIM SCHEFTER“Step into the computer,” said my guide.I did, and felt the chilling sensation of moving into the megabit maw of a machine so advanced in electronic intellect that it can only talk to other machines.For a moment, I was apprehensive.It was like entering a silicon crypt. The air was significantly colder inside the polyhedral chamber than outside. Yet I knew that I was surrounded by hundreds of thousands of heat-producing electronic circuits, drawing six times as much electricity as any other machine in the room.This was the CRAY-1, the amazing supercomputer designed by a reclusive Wisconsin genius. It’s 10 times faster than the biggest IBM computer on the market. And this particular CRAY-1, installed in a major computer center in Kansas City, was being fed by two giant Control Data computers just to keep it busy.“You’re looking at the architecture of Seymour Cray,” said a voice floating over the top of the computer.The voice belonged to Jack Lorenz, president of United Computer Systems and owner of the first commercially installed CRAY-1 system. I saw what he meant. The CRAY-1 is unique, not only in electronic architecture and performance, but in size and shape as well. It doesn’t look like any other computer.From the outside, the CRAY-1 resembles one of those automatic photo machines that give you four fuzzy photos of yourself in a minute or so. It’s a hollow, 16-sided column, 6-1/2 feet tall, nearly five feet wide, and surrounded by upholstered benches. Four sides are missing to give access to the interior, which has no ceiling.Standing in the CRAY-l’s chilly center—it’s one of the few computers with built-in refrigeration—I was struck by the wiring. Each of the 12 vertical panels was a thick, solid mass of blue and gray wires. There is no color coding in the CRAY-1. How does one tell the wires apart? One doesn’t.“It’s designed and built on a from-and-to wire list,” I was told later by engineer Lee Higbie at the headquarters of Cray Research, Inc., in Minneapolis. “First we do all the one-foot wires, then all the two-footers, then the three-footers. There are only a couple of four-footers in the entire unit.”I walked out of the CRAY-1 and back into the real world of more familiar computers. UCS sells computing services, and its data center holds 18 other machines, most of them large, rectangular Control Data units such as the 6600 and the Cyber 175.Compared with the older computers, the CRAY-1 looks like a decorative toy sitting in the corner. The upholstered benches contain the computer power supply. The entire computer covers just 70 square feet of floor space. Yet its capabilities make it the premier performer in the room. Seymour Cray not only made the outside of his machine look different. Its internal structure is technologically a radical improvement.Super speedThe CRAY-1 is fast. It will cruise along at 80 MFLOPS. That’s 80 million floating-point operations (such as addition or multiplication) per second. With some computations, there’s an overlap that pushes its speed to 140 MFLOPS. And in short bursts, the CRAY-1 has been clocked at 250 MFLOPS.By comparison, a Cyber 176 or an IBM 360/195-each superfast by former standards—chugs through its duties at four to seven MFLOPS or less.That’s why it takes “front-ending,” putting another computer on line as an input-output device, to get efficient use from a CRAY-1. Even then, the supercomputer has time to rest.“Routine jobs go through the Cray with a ‘blip,’ ” Lorenz told me. “It accepts, executes, and completes them as fast as you can feed it. But the real measure of performance is on the tough jobs, like structural or reservoir analysis, or oil-exploration model-ing.”Such jobs require a computer to run lengthy batches of similar calculations, each only slightly different from the last, until the best possible solution is found.“We’ve had jobs come in that ran 24 hours on a 6600,” Lorenz explained. “That same job would run two hours on the CRAY-1.”To find out why the CRAY-1 is so fast, I visited Cray Research headquarters in Minneapolis. Seymour Cray himself works in isolation at his laboratory in nearby Chippewa Falls, Wis. A shy, introverted man of 54, he repeatedly shunned interviews. He is more comfortable with computers than with people, and designs sailboats for relaxation. His outside contacts are limited to rare discussions with potential customers or other technical experts.Cray’s genius sparked early. He was 32 when he left Univac with a group of co-workers to found the Control Data Corporation. CDC’s first commercially successful computer, the 1604, sprang from his pen, its intricate circuitry drawn quickly, but carefully, on page after page of graph paper. Working often alone and late into the night, he followed with the CDC 6600 and 7600.He left CDC in 1972 to form his own company. Though its headquarters are in Minneapolis, literally in the shadow of the CDC main complex, “Seymour’s shop” and the company’s manufacturing facility are in Chippewa Falls. Through all developments,Cray’s work habits haven’t changed. “He gets up late and he goes to bed late,” company president John Roll-wagen said. “He’s the type to concen trate completely on a problem until he solves it.”The problem of designing faster and faster computers is Cray’s passion. Each time he solves the problem, he starts over again to do it better In the CRAY-1, he solved it by combining unique electronic circuitry with mechanical engineering.“Cray’s designs are simple and they’re fluid,” Higbie said. “They evolve and change until he’s satisfied with them.”In the CRAY-1, simplicity means a design with only three kinds of integrated circuit chips—one for memory, one for logic, and one for internal register. The finished machine contains more than 350,000 chips. But it’s the way they’re put together that makes the CRAY-1 a supercomputer.One major limiting factor in computer operations is the speed at which a signal travels through connecting wires. The longer the wire, the longer it takes for a computer “message” to get through. And a signal that must work its way through a wire maze in a computer filling a 12-foot cabinet will take longer than a signal zipping around in the CRAY-l’s five-foot polyhedron.Cray reasoned that a circular cabinet offered the best way to keep wire lengths to a minimum. He flanked the computer’s central processing unit (CPU)—its logic, or brain—with banks of memory chips.“It’s really a CPU bathed in memory,” Higbie said with the understatement of an engineer grown accustomed to thinking in supercomputer superlatives. “But it’s only a moderate-sized memory, say about the size of a half dozen IBM 360′s’Cray’s concept for the computer cabinet also yielded the densest packing structure for the thousands of circuit boards filling each machine. Rather than individual boards as in conventional computers, Cray sandwiches groups of them together to form plug-in modules.“These modules are the key to everything,” Higbie said, handing one over for my inspection. It was heavy, and measured about six by nine inches. Each side was lined with small integrated circuit packages. The CRAY-1 had 113 different module combinations using the three basic circuits. A full module holds 288 circuits.The module itself is a Cray innovation It has five layers. The two outer layers, top and bottom, are modifiedboards holding the chip packages. Interior boards carry the electronic impulses over printed circuitry. But, rather than running in straight lines, the etched wiring zigzags back and forth from a source through chip packages. Each silvery little pathway looks like a child’s maze. Some are long, with dozens of right-angle turns. Some are short, with only a few.“Every etched wire has been measured,” Higbie explained. “They were designed that way for timing purposes, to make sure that every signal arrives at exactly the right time.”In the world of supercomputers, that timing is measured in nanoseconds—billionths of a second. The six-inch width of a CRAY-1 circuit module equals one nanosecond, with a signal traveling in a straight line. A signal zigzagging across the module takes longer.Cray’s design gets maximum efficiency in computing power by exercising that rigid control over signal timing. With most non-etched wires being only one foot long, signals waste little time en route, but always arrive at the appointed nanosecond because of the maze-like board etching. Even with a number of circuits and boards involved in any given computation, the CRAY-l’s time for an average calculation is just 12.5 nanoseconds. That converts to 80 million calculations each second.Keeping coolThe modules themselves are packed so densely into frames—up to 72 of them in a 28-inch chassis—that they almost touch each other. That packing helps minimize the distance signals must travel, but it leads to unique heating problems.The CRAY-1 draws 100 kilowatts of electricity, more than any other commercial computer. In comparison, astronauts operated the Skylab space station on less than 10 kilowatts. A typical home may draw six kilowatts at peak moments.With each circuit board generating heat, Cray knew that a new cooling scheme was needed. The air-conditioned coolness of normal computer centers wouldn’t do for his machine. That led to the middle layer of Cray’s five-layer module, and to some unique plumbing in the computer framework.“The midsheet in the circuit module is heavy copper with a Teflon coating,” Higbie said. “It’s both an electrical insulator and a heat conductor.”The copper sheet’s edges are left bare. When the module is installed in the chassis, those edges fit into the notches of an aluminum cold plate. Within the cold plate are stainless-steel tubes carrying Freon refrigerant. The refrigerator unit itself is in the floor below the computer.The constant flow of Freon draws heat away so rapidly that the CRAY-1 is actually cooler than its air-conditioned surroundings, though it may warm up in prolonged operation. That accounts for the sudden chill I felt when I first stepped into the machine.“We could have installed the CRAY-1 anywhere,” Jack Lorenz of UCS told me. “It doesn’t require the air-conditioned environment that the rest of our machines the CRAY-1 is physically designed for speed, its mental format—just how it handles numbers—is different, too. It’s a vector processor. Most computers are scalar. That is, they perform one computation at a time. Each result goes into memory, then is retrieved, as needed, for other computations.Vector processors, however, perform multiple computations, usually adding, subtracting, multiplying numbers all at once.In its simplest form, vectorizing is like setting up an assembly line of numbers. Each equation is loaded in part at the beginning of the line. And at each point, or segment, the numbers are manipulated in a certain way—added, subtracted, etc. But, as each operation moves down the line, another set of numbers enters at the beginning. The result is that the computer handles many sets of numbers at the same time, and uses complex formulas to keep track of them all.The real benefit of vectorizing comes when massive groups of numbers must be processed. Like a car assembly line, it may take a week to produce the first one, but from then on, one rolls off every minute. Each step in the vector process gives an interim solution (see diagram) used in the next step. In the CRAY-1, those solutions are “chained,” used directly without going to and from memory.It’s this vectorizing ability that makes it 10 times faster than any other commercial machine.Even for single operations the CRAY-1 is fast. For these, it can be used as a conventional scalar computer; and it’s still twice as fast as any other machine.A vector computer is a very rare breed. There are only about a dozen non-Cray vector computers in the world. And none of them, with the possible exception of the one-of-a-kind ILIAC IV installed at NASA’s Ames Research Center, matches the Cray in performance or reliability.Who needs itBy early 1979, Cray had delivered eight machines and had orders for four more. Cost: about $8 million each. Who needs such massive computing power?John Rollwagen leaned against his specially designed and built standup desk—he shuns the image of an executive hiding behind a slab of walnut—and ran down the list of customers. One machine went to Los Alamos Scientific Laboratories, where its primary job is to simulate nuclear explosions. A typical computer program used in weapons development, and run on the lab’s CDC 7600, required 90,000 lines of coded instructions, and took nine hours of computation time. The CRAY-1 will do the job faster, but,
                        even so, some nuclear research will tax its ability.Two machines are involved in weather-related projects, one at the National Center for Atmospheric Research in Boulder, Colo., and one at the European Center for Medium-Range Weather Forecast (ECMW) in England. ECMW issues 10-day weather forecasts for the European continent each night. Thousands of variables go into the computer to be vectorized through billions of calculations leading to a forecast. Even with the CRAY-1, the calculations take nearly 10 hours to complete.Two machines went to the Department of Defense. Rollwagen can’t say where they are or what they’re doing. But some reports hint that they’re engaged in code breaking.Two more are at Lawrence Livermore Laboratory, where they are being used to solve the problems of magnetic and laser fusion. And the eighth is at UCS in Kansas City.The success of Cray, along with signs that CDC will be back with an improved vector processor in 1979, already is spawning peripheral businesses. True to computer-industry tradition, the hardware is ahead of the software, or programming.Cray significantly increased its programming staff in 1978, but a small company called Massachusetts Computer Associates, Inc. (Compass) beat it to one important element that opens the CRAY-1 to a variety of scientific applications.Compass developed and copyrighted a program they call a “vecto-rizer,” which translates standard computer code into a modified version that speeds through the CRAY-1 logic. Shortly after the UCS CRAY-1 became available to commercial users, Compass analyst Bob Brode worked with Continental Airlines on one application.The airline’s problem was to assign crews in the most economical way. They had to consider such factors as flight schedules, crew pay, layover costs, motels, meals, and more. Each year the airline spent several hundred thousand dollars in computer time just to find the best schedule.“There are millions of possibilities, so the computer has to sit there and do the same section of the program over and over again with just slightly different data,” Brode explained.The vectorized program ran 2-1/2 times faster on the CRAY-1 than on other machines, and Continental will save up to 60 percent of its former costs, he said. “Any program, commercial or otherwise, that requires that kind of repetition is worth vectorizing,” he added.The people who build supercomputers agree. Seymour Cray has retreated to his Chippewa Falls hideaway and already is well along on designing the CRAY-2.“It’ll be twice as fast and four times as efficient as the CRAY-1,” Higbie said. “We’ll let Seymour tell you the rest when he’s finished.”
                        *

                        April 6, 1972

                        –Cray Research, Inc. (CRI) opens in Chippewa Falls, WI1973

                        –Opens business headquarters in Bloomington, MN1975

                        –Powers up first Cray-1TM supercomputer1976

                        –Delivers first Cray-1 system (Los Alamos National Laboratory)

                        –Issues first public stock offering–Receives first official customer order

                        (National Center for Atmospheric Research)

                        1977

                        –Makes first international shipment (European Center for Medium-Range Weather Forecasts)

                        –Produces first commercially available automatic vectorizing compiler

                        1978

                        –First Cray User Group (CUG) meeting–Opens subsidiary in the UK

                        1979

                        –Signs first university customer (Univ. of London)–Signs first electronics customer (Bell Labs)–Opens subsidiaries in Japan and Germany–Signs first German customer

                        (Max Planck Institute)–Cray researcher discovers 27th Mersenne

                        prime on Cray-1 system–Announces Cray-1STM supercomputer

                        1980

                        –Signs first Japanese customer (Century Research Corp.)

                        –Signs first aeronautical and aerospace customer (Boeing)

                        –Opens subsidiary in France–Signs first French customer (Electricité de France)

                        1981

                        –Signs first petroleum customer (Atlantic Richfield)

                        –Introduces Cray-2TM supercomputer and liquid cooling technology

                        1982

                        –Announces SSDTM solid-state storage device–Announces Cray X-MPTM, the first multiprocessor

                        (Canada Met)–Cray researcher discovers 28th

                        Mersenne prime on Cray-1 system

                        ©2010 Cray Inc. All rights reserved. Specifications subject to change without notice. Cray is a registered trademark, and the Cray logo are trademarks of Cray Inc. All other trademarks mentioned herein are the properties of their respective owners. 100713

                        1986

                        –Signs first medical research customer (National Cancer Institute)

                        –Signs first chemical industry customer (DuPont)–Signs first Australian customer (DoD)

                        1987

                        –Opens subsidiary in Spain–America’s Cup-winning yacht “Stars & Stripes�

                        designed on Cray X-MP system–Ships 200th system–Becomes Fortune 500 company–Establishes Cray Academy

                        –Tera Computer Company founded1988

                        –Opens subsidiaries in South Korea and India

                        1993

                        –Forms Cray Research Superservers–Announces Cray EL92TM and Cray EL98TM systems–Signs first South African customer

                        (South Africa Weather Service)–Signs first SE Asian customer

                        (Technological Univ. of Malaysia)–Announces Cray T3DTM

                        massively parallel processing (MPP) system–Signs first financial customer (Merrill Lynch)

                        1994

                        –Announces Cray T90TM supercomputer, first wireless system

                        –Signs first Chinese customer (National Meteorological Center)

                        –Signs first Polish customer (Poznan Supercomputing & Networking Center)

                        –Acquires Savant Systems–Acquires Minnesota

                        Supercomputing Center–Announces Cray J90TM system–Cray researchers discover 33rd Mersenne prime

                        on Cray C90 system

                        1995

                        –Announces Cray T3ETM MPP supercomputer, first to sustain 1 teraflops performance

                        –Announces Cray T94TM system–Signs first Russian customer (Roshydromet)

                        1996

                        –Cray researchers discover 34th Mersenne prime on Cray T94 system

                        –Silicon Graphics purchases Cray Research1998

                        –Multistreaming compiler developed for Cray SV1TM

                        –Tera introduces Tera MTA supercomputer, first multithreaded architecture system

                        2000

                        –Tera acquires CRI business unit from SGI and forms Cray Inc., headquartered in Seattle–Announces Cray SV1exTM supercomputer

                        2001

                        –Announces Cray SX-6TM series–Announces Alpha Linux supercluster systems

                        2002

                        –Announces Cray X1TM supercomputer, first system with 51 teraflops peak performance

                        –Joins Russell 3000 Index–Signs $90M “Red Storm� contract with

                        Sandia National Laboratories

                        2004

                        –Acquires OctigaBay Systems Corp.–Announces Cray XD1TM supercomputer–Announces Cray XT3TM supercomputer–Announces Cray X1ETM supercomputer

                        2006

                        –Announces Cray XT4TM supercomputer–Announces massively multithreaded

                        Cray XMTTM supercomputer–Exceeds 1 TBps on HPCC benchmark

                        test on Red Storm system–Wins $200M contract to deliver

                        world’s largest supercomputer to

                        Oak Ridge National Laboratory (ORNL)–Wins $52M contract with National Energy Research

                        Scientific Computing Center–Signs $250M agreement

                        to develop breakthrough adaptive supercomputer with Defense Advanced Research Projects Agency (DARPA)

                        2007

                        –Wins $85M contract to provide centerpiece system for UK’s HECToR project

                        –Establ ishes development office in Austin–Announces Cray XT5TM supercomputer, MPP system–Announces Cray XT5hTM hybrid supercomputer featuring

                        Cray X2TM vector blade and Cray XR1TM FPGA blade

                        2008

                        –Announces strategic partnership with Intel on

                        1983

                        –Opens subsidiary in Canada

                        1989

                        –Cray-1 supercomputer enters Smithsonian Institute–Cray Blitz program beats chess grand master–Signs first Finnish customer (VTKK)–Signs first pharmaceutical customers

                        (Eli Lily and Monsanto)–Seymour Cray leaves CRI and forms

                        Cray Computer Corporation–Announces Cray Y-MP 2ETM supercomputer,

                        first air-cooled system

                        1990

                        –Announces Cray XMSTM and Cray ELTM systems–Receives first Bell-Perfect award–Establishes Cray Europe

                        1991

                        –Ships 100th Cray Y-MP system

                        –Announces Cray Y-MP 8TM, Cray Y-MP ELTM and Cray Y-MP 4ETM systems

                        –Acquires Floating Point Systems, Inc.

                        –Forms Cray Customer Service division

                        –Announces Cray C90TM supercomputer, first computer with 1 gigaflops processor

                        1992

                        –Signs first Swiss customer (EPFL)

                        –Announces Cray Y-MP M90TM and Cray S-MPTM superservers

                        –Signs first Czech customer (Czech Hydrometeorological Institute)

                        –Cray researcher discovers 32nd Mersenne prime on Cray-2 system

                        –Releases first Fortran 90 compiler

                        – – – –

                        Signs first Dutch customer (Shell) Signs first automotive customer (GM) Signs first Swedish customer (Saab) Scientists discover 29th Mersenne prime on Cray X-MP system

                        1984

                        –Signs first Saudi Arabian customer (Aramco)–Opens subsidiary in Italy

                        1985

                        –Signs first Italian customer (CINECA)–Ships 100th system–Opens subsidiaries in Switzerland and Australia–Cray researcher discovers 30th Mersenne prime

                        on Cray X-MP system

                        – –

                        future supercomputing products Launches Cray CX1TM deskside supercomputer and partnership with Microsoft Cray XTTM system at ORNL breaks sustained petaflops barrier

                        –

                        – –

                        – –

                        Announces Cray Y-MPTM supercomputer, first to sustain 1 gigaflops Signs first Spanish customer (CASA) Signs first Indian customer (National Centre for Medium Range Weather Forecasting)

                        Signs first S. Korean customer (Korea Advanced Institute of Science & Technology) Ships 300th system

                        2009

                        –Forms India subsidiary–Launches Cray XTmTM midrange supercomputer series–Acquires PathScale Compiler Suite assets from SiCortex–Introduces Cray CX1-iWSTM with exclusive reseller Dell–Cray XT5 system at ORNL named world’s fastest

                        supercomputer on Top500 list–Introduces next-generation

                        Cray XT6TM supercomputer series

                        2010

                        –Introduces Cray CX1000TM, rack-mounted supercomputer with Intel® Xeon®

                        Cray Linux EnvironmentTM 3.0 with Cluster Compatibility Mode

                        –Launches Cray XE6TM supercomputer, next-generation MPP system


                        Seymour Cray– A Man Whose Vision Changed the World

                        Recognized as “the father of supercomputing” and credited with single-handedly creating and leading the high performance computer industry for decades, Seymour R. Cray was a single minded computer engineer, regarded by some as a true maverick and “serial” pioneer. Jokingly, he would refer to himself as “an overpaid plumber.”

                        The Beginnings

                        Born September 28, 1925 in Chippewa Falls, Wisconsin, Seymour had a fascination with electronics and electrical devices from boyhood; his father was a civil engineer. In high school the young Cray preferred to be in the electrical engineering laboratory as much as possible. Following graduation from high school in 1943, he joined the US Army serving in an infantry communications platoon. He arrived in Europe the day after D-Day and saw action in the Battle of the Bulge campaign. Later he served in the Pacific Theater in the Philippine Islands.

                        After returning from the war, Seymour earned a Bachelor of Science degree in Electrical Engineering from the University of Minnesota in 1950, followed by a Masters degree in Applied Mathematics in 1951. Shortly thereafter, he joined a new local company called Engineering Research Associates (ERA). Housed in an old glider factory in St. Paul, Minnesota, ERA built specialized cryptographic equipment for the US Navy. While there he worked the gamut of computer technologies, ranging from vacuum tubes and magnetic amplifiers to transistors. It was also here that he had the opportunity to design his first computer, the 1103.

                        “Anyone can build a fast CPU. The trick is to build a fast system.” – Seymour Cray

                        Seymour’s passion for building scientific computers led him to help start Control Data Corporation (CDC) in 1957. There he met his goal of building the fastest scientific computer ever, resulting in the CDC 1604, the first fully-transistorized commercial computer (no more vacuum tubes). Release of the CDC 6600 -- considered the world’s first actual supercomputer, capable of nine Mflops (million floating-point operations per second) of processing power and cooled by Freon -- followed in 1963. The CDC 7600 was next, running at 40 Mflops, again the world’s fastest supercomputer. In 1968 he began work on the CDC 8600 designed for greater parallelism using four processors all sharing one memory.

                        In 1968, Seymour was awarded the W.W. McDowell Award by the American Foundation of Information Processing Societies for his work in the computer field.

                        Seymour served as a director for CDC from 1957 to 1965 and was senior vice president at the time of his departure in 1972 when CDC decided to phase out development of large-scale scientific computers. That year he founded Cray Research Inc. in Chippewa Falls, Wisconsin.

                        In 1972 Seymour was also was presented with the Harry H. Good Memorial Award for his contributions to large-scale computer design and the development of multiprocessing systems.

                        Vector Processing is Born

                        Thesignature Cray-1TMvector supercomputer established a world standard in supercomputing with its introduction in 1976. Integrated circuits replaced transistors, and the Cray-1 delivered 170 Mflops.

                        Seymour Cray standing next to the core unit of the Cray-1 computer, circa 1974Photograph courtesy of the Charles Babbage Institute, University of Minnesota, Minneapolis

                        “By 1970, Cray had been directly responsible for the design and development of the systems that were to shape the high performance computer industry for years to come...

                        “All of Seymour’s systems were masterpieces of technology and esthetic design. To Seymour, elegance of physical design was as important as reaching the performance goals. In this area also he was unmatched by anyone.”

                        Charles W. Breckenridge, Keynote Session at SC1996, 11/19/96

                        In the years following CDC's founding, Seymour relinquished the company's management reins to devote more time to computer development. From 1972 to 1977 he served as director, chief executive officer, and president of the company. In October 1977, he left the presidency of Cray Research, but remained chief executive officer and became chairman of the board. In 1980, he resigned as chief executive officer, and in 1981, Cray stepped aside as chairman of the board and, as a full-time independent contractor, devoted himself to the Cray-2TMproject. With the Cray- 3TM, his attention returned to the possibilities of gallium arsenide processing chips and reduced packaging.

                        In 1985 the Cray-2 computer system moved supercomputing forward yet again, breaking the gigaflop (one thousand Mflops) barrier. Having first experimented with gallium arsenide as an ultrafast semiconductor material, Seymour returned to the use of silicon chips and introduced Flourinert, an inert fluorocarbon liquid, as a coolant.

                        In 1989 he left Cray Research to form Cray Computer Corporation (CCC), based in Colorado Springs, Colorado. Here he began work on the Cray-4. CCC closed its doors in 1995 due to financial pressures.

                        In 1996 Seymour started SRC Computers, Inc. and started the design of his own massively parallel supercomputer, concentrating on the communications and memory performance. Tragically, on October 5, 1996 at the age of 71, Seymour Cray passed away in Colorado Springs, Colorado due to injuries suffered in an automobile accident that occurred two weeks earlier.

                        Tribute

                        “It seems impossible to exaggerate the effect he had on the industry; many of the things that high performance computers now do routinely were at the furthest edge of credibility when Seymour envisioned them.

                        “I have had the opportunity to work with several of his very talented protégés who went on to other companies, and his considerable legacy as a teacher and mentor has also had a far-reaching effect.

                        “Seymour combined modesty, dedication, and brilliance with vision and an entrepreneurial spirit in a way that places him high in the pantheon of great inventors in any field. He ranks up there with Edison and Bell of creating an industry.”

                        Joel Birnbaum, CTO, Hewlett-Packard

                        Throughout his 45-year career, Cray’s guiding principle in designing computers was “simplicity.” Seymour Cray is the inventor of a number of technologies that were patented by the companies he worked for. Among the most significant are the Cray-1 vector register technology, the cooling technologies for the Cray-2 computer, the CDC 6600 Freon-cooling system, and a magnetic amplifier for ERA. He also contributed to the Cray-1 cooling technology design.

                        Further Seymour Cray References:

                        Seymour Cray- WikipediaAn Imaginary Tour of a Biological Computer (Why Computer Professionals and Molecular

                        Biologists Should Start Collaborating)- Smithsonian National Museum of American HistorySeymour Cray Interview- Smithsonian National Museum of American HistoryA Seymour Cray Perspective- Gordon BellA Tribute to Seymour Cray- Charles Breckenridge, SRC Computers, Inc.

                        Obituary - Seymour Cray, Father of Supercomputing-Chris Lazou


                        *
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